1. Field of the Invention
The invention relates to microcontrollers, and more specifically, to a microcontroller providing an improved direct memory access controller for use in conjunction with a serial interface.
2. Description of the Related Art
Specialized microcontrollers with integrated communication features are becoming particularly attractive for communications applications. A microcontroller, or an embedded controller, is uniquely suited to combining functionality onto one monolithic semiconductor substrate (i.e. chip). By embedding various communication features within a single chip, a communications microcontroller may support a wide range of communication applications.
Microcontrollers have been used for many years in many applications. A number of these applications involve communications over electronic networks, such as telephone lines, computer networks, and local and wide area networks, in both digital and analog formats. In communications applications, a microcontroller generally has a number of integrated communications peripherals in addition to the execution unit. These can be low and high speed serial ports, as well as more sophisticated communications peripherals, such as a universal serial bus (USB) interface, and high level data link control (HDLC) channels.
An asynchronous serial communications port is one such common additional feature in a microcontroller. An asynchronous serial link allows the microcontroller to communicate with other devices or over data lines by sequentially sending and receiving bits of data. The xe2x80x9casynchronousxe2x80x9d nature indicates these ports do not provide a separate clock signal to clock the data. Instead, the rate at which data is sent and received must be predetermined or prenegotiated, and independently controlled on both the sending and receiving ends. This data rate is known as the baud rate, which is the inverse of one bit period. The baud rate is generally one of a number of predefined rates, which are standard within the industry. Such rates include 1200, 2400, 4800, 9600, 19.2K, 28.8K, 33.3K, and 54K baud and high data transfer rates.
Due to the prevalence of serial data communication, many microcontrollers include one or more asynchronous serial ports (ASPS) which can transmit and receive data one bit at a time. Such microcontrollers typically employ interrupt signals to notify the microprocessor core that an ASP requires services. An ASP typically issues an interrupt request signal when a data unit has been received by the ASP and needs to be transferred from the ASP to an external memory unit, when the ASP is finished transmitting a data unit and the next data unit to be transmitted must be transferred from the external memory unit to the ASP, or when an error occurs.
An ASP can be configured for a variety data formats, although historically seven or eight data bits are typical values. A number of nine-bit serial protocols, however, have been developed using microcontrollers, including a nine-bit asynchronous serial protocol in conjunction with direct memory access. Such protocols are described in U.S. patent application Ser. No. 08/807,103, now U.S. Pat. No. 5,896,549 entitled A MICROCONTROLLER WHICH IS CONFIGURABLE TO TRANSFER DATA TO AND FROM ONE OR MORE ASYNCHRONOUS SERIAL PORTS USING DIRECT MEMORY ACCESS, filed Feb. 4, 1997, by John P. Hansen and Melanie D. Typaldos, and U.S. patent application Ser. No. 08/775,262, now U.S. Pat. No. 5,978,865 entitled A MICROCONTROLLER HAVING HARDWARE FEATURES SUPPORTING 9-BIT SERIAL PROTOCOLS DURING DMA DATA TRANSFERS TO AND FROM ONE OR MORE ASYNCHRONOUS SERIAL PORTS, filed Feb. 4, 1997, by John P. Hansen, Ronald W. Stents, and Melanie D. Typaldos, both of which are commonly assigned and hereby incorporated by reference. These protocols are also described in the Am186ES Users Manual and Am186ED Users Manual, both by Advanced Micro Devices, Inc. of Sunnyvale, Calif. As described in those applications, and as discussed below, a separate control bit is set or reset to act as the ninth data bit during transmission and reception of data. To support DMA using such 9-bit protocols, when that particular bit is received as a certain value, an interrupt is caused to indicate that the ninth data bit has in fact been set.
According to the invention, a microcontroller includes a direct memory access (DMA) controller that provides compression and decompression of data. Specifically, the DMA controller has source and destination increment values that can be adjusted and are independent of the transfer item size. A source pointer and a destination pointer can be set to blocks in memory, with the source block containing word sized data whose top byte is to be discarded. The source can be set to increment by two after each transfer, and the destination by one. Then, DMA is performed transferring a byte of data from each word in the source, incrementing to the next word, and incrementing to the next byte for the destination. In this way, one byte of data is stripped from each word using DMA with little processor intervention.
This is especially useful when employing an asynchronous serial port that supports extended reads in conjunction with DMA. Sequences of data can be read from the serial port, with each 7 or 8 bit value having a corresponding status byte stored by the DMA controller. Once these status bytes are examined for address bits or error bits, the DMA can be programmed to xe2x80x9cstripxe2x80x9d the unneeded byte of data.
Similarly, before performing a DMA transfer, byte level data can be expanded into words, with extended write bytes appended to the front of data for transfer by the DMA controller to the asynchronous serial ports supporting extended writes.